1. Field of the Invention
This invention relates to differential amplifier circuits and, more particularly, to amplifier circuit designs with reduced power-up time, reduced power consumption and improved reliability.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
Amplifiers are often used in integrated circuit design. Even in the case of digital integrated circuits, amplifiers may be used for purposes such as providing a reference voltage for other parts of the circuit. Amplifier circuits generally include a plurality of stages, such as an input stage, a gain stage and an output stage, among others. In differential designs, a pair of differential signals may be supplied to the input stage of the amplifier, the difference between which may be amplified (primarily) in the gain stage before it is supplied to a low impedance output stage.
Amplifiers use power from a DC power supply to produce an output signal with increased voltage and/or current with respect to the input signal(s) supplied thereto. Specialized amplifiers, known as operational amplifiers, exhibit extremely high voltage gain, high input impedance, and low output impedance. Operational amplifiers are useful in producing output voltages with specific mathematical relationships to the input voltages supplied thereto. Operations such as addition, subtraction, multiplication, division, differentiation, and integration can be realized by configuring the operational amplifier with additional circuit elements. For example, a voltage multiplier circuit can be formed using a resistor network with an operational amplifier to multiply a constant factor by an input reference voltage. In this way, a voltage reference can be made available to an integrated circuit.
A current trend in integrated circuit design is that the power supply voltages available to integrated circuits are continually being reduced. The reduction in power supply voltage is used to reduce overall power consumption of the integrated circuit, which may be particularly important for the use of portable and other battery operated devices, and to reduce heating problems caused by increasing circuit density. Early operational amplifiers often used power supply voltages on the order of ±10 volts or ±15 volts. Due to scaling transistor geometries, however, current integrated circuits typically use power supply voltages ranging from about 0 volts to about 3 volts, 2 volts, or less. Unfortunately, conventional operational amplifier designs often suffer from degraded performance when supplied with a low voltage power supply.
To preserve amplifier performance with low power supply voltages, it is often desirable to use amplifier architectures that do not require large voltage headroom. In battery powered applications, the current used in each stage of the amplifier should be reduced as much as possible to reduce power consumption. In these low power applications, it often necessary for circuits to have a power down mode where the operating current is reduced to negligible levels. To accomplish this, internal current sources are turned off and there should be no floating nodes that can conduct current.
One typical way in which to reduce power consumption within an amplifier is to tie the gate voltages to a power supply of p-type transistors, turn off the current sources, and otherwise ensure there is no direct current path from the power source to ground during times when the amplifier is not in use. However, after the amplifier receives a signal, such as a differential pair of signals on an input stage, the amplifier must come out of the power-down mode, sometimes referred to as the “sleep state.” Of course, there may be other commands for initiating a power-up status besides simply applying a differential pair of signals to the input. The power-up status begins by initiating optimal voltages and currents onto the amplifier so that when the differential signals are received within a gain stage of the amplifier, the amplifier can quickly operate in its normal operating condition. The startup sequence should also be fairly short and, importantly, must not consume a significant amount of power either in the gain stage or the next stage, which is sometimes referred to as the output stage. Unfortunately, however, typical amplifier circuits that implement a power-down (or sleep state) followed by a power-up sequence before entering a normal operation condition, consume significant amounts of power or otherwise take undesirably long periods for the power-up sequence to occur. Even so, such conventional circuits may not place the internal nodes of the gain stage at their optimal levels, taking into consideration the common mode voltage of the differential signals applied to those nodes.
Many conventional amplifier circuits that utilize a differential amplifier also have common mode feedback from the output stage back to the gain stage. The feedback can measure the common mode voltage at the output, compare that common mode voltage to the desired common mode value, and make the appropriate adjustments to the gain stage to ensure it remains centered on the desired common mode value. Also, conventional operational amplifiers utilize what is known as “compensation capacitors” across the input and output of the gain stage. The compensation capacitors serve many functions, one of which is to prevent oscillations or unwanted glitches from occurring within the feedback path of the amplifier. One mechanism in which to reduce the power-up time is to use smaller compensation capacitors or larger current sources within the gain stage. However, reducing the compensation capacitor sizes can compromise amplifier stability, and increasing the current sources will increase the power consumption of the amplifier. Therefore, a need remains for an improved amplifier design that reduces the power-up time needed for placing the compensation capacitors in their optimal voltage values from a sleep state to a normal, operational state. Moreover, the improved amplifier design must have minimal power consumption during the power-up state, with reduced power-up time without increasing the power or area consumed by the amplifier, or causing large variations in the output common mode voltage.